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The Seventh Workshop on
High-Performance, Power-Aware Computing
May 16, 2011, Anchorage, Alaska, USA

The 7th Workshop on High-Performance, Power-Aware Computing (HPPAC
2011) will be held
May 16, 2011 in Anchorage, Alaska, USA,
in conjunction with the
25th Annual
International Parallel & Distributed Processing Symposium (IPDPS
2011), May
May 16-20, 2011, Anchorage, Alaska, USA
Keynote Address
Bronis R. de Supinski (LLNL)
Power Aware Computing for Large Scale Scientific Workloads
Power and energy are central concerns for both large scale systems applied to scientific workloads and corporate data centers and will become even more important as we look towards exascale systems. Systems such as Lawrence Livermore National Laboratory’s BlueGene/L and Oak Ridge National Laboratory’s Jaguar already have over 100,000 processor cores, while the planned ASC Sequoia system at LLNL will have over 1.5 million cores when it is deployed in FY12. While hardware techniques have proven sufficient to fit these systems within the power budgets of these HPC centers, we anticipate that continued increases in processing power will require application-level power-aware techniques. Our initial experiences demonstrate that substantial energy savings are possible with current systems for programs using the MPI and OpenMP programming models. In this talk, I will detail energy saving techniques such as load smoothing based on dynamic voltage and frequency scaling and dynamic concurrency throttling and their application to large scale scientific workloads.
Scope
High-performance computing is and has always been performance-oriented.
However, a consequence of the push towards maximum performance is
increased energy consumption, especially in datacenters and
supercomputing centers. Moreover, as peak performance is rarely
attained, some of this energy consumption results in little or no
performance gain. In addition, large energy consumption costs
datacenters and supercomputing centers a significant amount of
money and wastes natural resources.
The main goal of this workshop is to provide a timely forum for the
exchange and dissemination of new ideas, techniques, and research in
high-performance, power-aware computing (HPPAC). HPPAC will present
research that reduces (1) power consumption, (2) energy consumption,
or (3) heat generation with little or no performance penalty in
high-performance computing systems. In effect, the workshop aims to
move towards "greener" solutions for
datacenters and supercomputing centers. Examples include
Green Destiny (2001),
The Green Grid (2007),
The Green500 List (2007), and the
INRIA Green-Net Initiative (2008).
Submission Guidelines
To submit a paper, upload a postscript or PDF copy of the paper
here. The paper
should not exceed 8 single-spaced pages (US Letter ) in 11pt font or
larger (click here for a template). All papers will be reviewed. The accepted papers will be
published in the same printed program book and CD-ROM proceedings as
the main conference IPDPS2011.
| 9.00-9.15 | Opening |
| 9.15-10.15 | Keynote: Power Aware Computing for Large Scale Scientific Workloads
Bronis R. de Supinski (Lawrence Livermore National Laboratory) |
| 10.15-10.45 | Coffee break |
| 10.45-12.15 | Session 1: Power aware scheduling |
| | Temperature Aware Load Balancing for Parallel Applications: Preliminary Work
Osman Sarood, Abhishek Gupta, Laxmikant V. Kale |
| | Design and Analysis of Heuristic Algorithms for Power-Aware Scheduling of Precedence Constrained Tasks
Keqin Li |
| | Rack Aware Scheduling in HPC data centers
Vikas Patil, Vipin Chaudhary |
| 1.30-3.30 | Session 2: Applications and trends |
| | Emerging Trends on the Evolving Green500: Year Three
Tom Scogland, Balaji Subramaniam, Wu-chun Feng |
| | Power Consumption of Mixed Precision in the Iterative Solution of Sparse Linear Systems
Hartwig Anzt, Enrique S. Quintana-Ortí, Vincent Heuveline, Björn Rocker, Maribel Castillo, Juan Fernández, Rafael Mayo |
| | Dynamic Frequency Scaling and Energy Saving in Quantum Chemistry Applications
Vaibhav Sundriyal, Masha Sosonkina, Fang Liu, Michael Schmidt |
| | Evaluation of the Energy Performance of Dense Linear Algebra Kernels on Multi-Core and Many-Core Processors
Maribel Castillo, Juan Fernández, Manel Dolz, Rafael Mayo, Enrique S. Quintana-Ortí, Vicente Roca |
| 3.30-4.00 | Coffee break |
| 4.00-5.30 | Session 3: Low power hardware components |
| | LAPP: A Low Power Array Accelerator with Binary Compatibility
Naveen Devisetti, Takuya Iwakami, Kazuhiro Yoshimura, Takashi Nakada,Jun Yao,Yasuhiko Nakashima |
| | Performance, Power, and Thermal Analysis of Low-Power Processors for Scale-Out Systems
Phillip Stanley-Marbell, Victoria Caparrós Cabezas |
| | Design and Evaluation of a Novel PCI Express Direct Link PEARL and Its Implementation PEACH
Toshihiro Hanawa,Taisuke Boku, Shin'ichi Miura, Mitsuhisa Sato |
| 5.30-5.40 | Closing |
Submission Guidelines
To submit a paper, upload a postscript or PDF copy of the paper
here. The paper
should not exceed 8 single-spaced pages (US Letter ) in 11pt font or
larger (click here for a template). All papers will be reviewed. The accepted papers will be
published in the same printed program book and CD-ROM proceedings as
the main conference IPDPS2011.
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- Frank Bellosa, University of Karlsruhe, Germany
- Taisuke Boku, University of Tsukuba, Japan
- Yuan Chen, HP Labs, USA
- Chen-Yong Cher, IBM, USA
- Marco Cesati, University of Rome "Tor Vergata", Italy
- Bronis de Supinski, LLNL, USA
- Xizhou Feng, Marquette University, USA
- Wu-chun Feng, Virginia Tech, USA
- Chung-Hsing Hsu, Oak Ridge National Laboratory, USA
- Canturk Isci, IBM, USA
- Rob Knauerhase, Intel Labs, USA
- Laurent Lefevre, INRIA, France
- David Lowenthal, University of Arizona, USA
- Hiroshi Nakashima, Kyoto University, Japan
- Ripal Nathuji, Microsoft, USA
- Karsten Schwan, Georgia Tech, USA
- Jordi Torres, BSC, Spain
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